1. Field of the Invention
The present invention is related to a chemical vapor deposition method that prevents particles from forming in a chamber, particularly related to a high-density plasma chemical vapor deposition method that prevents particles from forming in a chamber.
2. Description of the Prior Art
In semiconductor processes, in order to provide good electrical isolation, and to prevent short-circuiting between electric elements on a wafer, a localized oxidation isolation (LOCOS) process, or a shallow trench isolation (STI) process is used to isolate and protect the elements. Because the field oxide layer of the LOCOS process occupies a good deal of area on the wafer, and bird's beak can occur when growing the field oxide, an STI process is typically used in the semiconductor processes since the line width is below 0.25 μm.
Please refer to FIG. 1. In a typical STI process, a semiconductor substrate 4 is covered by an oxide layer 12, which serves as a buffer layer, so as to prevent the substrate from being damaged by thermal stress in subsequent processes. Following that, a silicon nitride layer 2 is formed on the oxide layer 12. A patterned photoresist (not shown) is put on the silicon nitride layer 2 and expose other parts of the silicon nitride layer 2 so as to define positions of STI. The exposed parts of the silicon nitride layer 2 are removed by an etching step to complete a pattern transform process so as to form a patterned silicon nitride layer 2. The patterned silicon nitride layer 2 is then applied as a mask, and parts of the semiconductor substrate 4, which are uncovered by the silicon nitride layer 2, are etched out to form trenches 8. Following that, silicon oxide 6 is deposited to fill the trenches 8. Lastly, a chemical mechanical polishing process is performed to complete the STI process.
However, due to decreasing of the line width, it becomes difficult to use conventional chemical vapor deposition (CVD) in an STI process. When using conventional CVD in an STI process, the deposition may fill the openings of the trenches 8 to form overhang, and thus causes problems, such as uneven coverage of voids or seams, or preventing the trenches from being filled. Therefore, a high-density plasma chemical vapor deposition (HDP-CVD) is used in the STI process presently. A chemical vapor deposition step and a sputtering etching step are performed in an HDP-CVD process. The sputtering etching step is able to remove deposition clogged in the openings of the trenches 8, and thus enable the trenches 8 be filled with the silicon oxide 6, which is deposited by chemical vapor deposition.
However, an oxide thin film is formed on the wall of the chamber while using an HDP-CVD process to deposit oxide. The oxide thin film may strip off the wall in subsequent processes and thus become a particle source that causes contamination. Therefore, a pre-oxide layer with appropriate thickness and quality is formed on the chamber wall in advance to enable the oxide thin film formed later to adhere to the pre-oxide layer, so as to prevent this particle issue. In order to form the pre-oxide layer, silane (SiH4) and oxygen (O2) are introduced to the chamber to form on the chamber wall a pre-oxide layer with appropriate thickness and quality.
After the pre-oxide layer is formed, a main HDP-CVD process is performed. That is done by introducing silane and oxygen into the chamber to deposit oxide to fill the trenches 8. While filling the trenches 8, there is a thin film of oxide formed on the chamber wall. However, there has been a pre-oxide layer covering the wall of the chamber. As a result, the oxide thin film generated in the trench filling step is able to adhere to the pre-oxide layer. However, the quality of the pre-oxide layer will influence the adherence of the later-formed oxide thin layer. Therefore, forming a pre-oxide layer with good quality is an important factor to prevent the chamber from being contaminated.
In addition, the oxide layer on the chamber wall will become thicker and thicker with every process performed. Therefore, when the oxide layer is too thick, a cleaning process is performed to remove the over-thickened oxide layer. In general, a cleaning process is performed in every ten HDP-CVD processes. However, the frequency of cleaning process performance is changed with the requirements of the process.
Although the particle issue in conventional semiconductor wafer fabrication can be prevented by the above method, in processes with critical dimension less than 90 nm, larger plasma power is applied to dissociate the molecules of reactant gases, so as to improve the gapfill ability and prevent the openings of the trenches from being clogged. When larger plasma power is applied, stronger collisions between particles cause the oxide layer on the wall to strip off more easily. In such a case, the conventional HDP-CVD method will not be able to prevent the particle issue. As a result, there is need for an improved method to resolve the particle issue in small critical dimension processes.